Friday, March 24, 2017

Looking For A Way To Ensure High Signal Quality... | Keysight Community

Looking For A Way To Ensure High Signal Quality... | Keysight Community

Wednesday, March 15, 2017

Helical (Helix) Antenna Design

The helix antenna is a travelling wave antenna, which means the current travels along the antenna and the phase varies continuously. Helix antennas (also commonly called helical antennas) invented by John Kraus give a circular polarized wave.  Helix antennas are referred to as axial-mode helical antennas. The benefits of this helix antenna are it has a wide bandwidth, is easily constructed, has real input impedance, and can produce circularly polarized fields. There are two mode of circular polarization in helix antenna.
Left handed helix antenna: In left handed helix antenna if you curl left hand fingers around the helix, thumb would point up. The waves emitted from this helix antenna are Left Hand Circularly Polarized.
Right handed helix antenna: In right handed helix antenna if you curl right hand fingers around the helix, thumb would point up. The waves emitted from this helix antenna are Right Hand Circularly Polarized
The minimum number of turns for a helix is between 3 and 5. There are many online tools available to calculate design parameter of helical antenna.

Design parameters for Helical Antenna

  • D – Diameter of a turn on the helix antenna.
  • C – Circumference of a turn on the helix antenna (C=pi*D).
  • S – Vertical separation between turns for helical antenna.
  • α  – Pitch angle, which controls how far the helix antenna grows in the z-direction per turn
  • N – Number of turns on the helix antenna.
  • H – Total height of helix antenna, H=NS.

Broad-Band Helix Antenna Design

Below is example of one Helix antenna that work at central frequency 1.35 GHz.
helix1.jpg
Radius-20 mm
Wire Radius – 2 mm
Number of Turn – 12
Height – 400 mm
Rotation- RHS
Helix antennas of at least 3 turns will have close to circular polarization in the +z direction when the circumference C is close to a wavelength.
 helix2.jpg
The helix antenna functions well for pitch angles between 12 and 14 degrees. Typically, the pitch angle is taken as 13 degrees.

Simulated Result

Antenna is simulated using Finite-Difference Time domain (FDTD) technique. Below is simulated return loss and field plot.
helix3.jpg
Helix_gainAntenna radiation pattern ( Far Field data plot) is shown below . Antenna Gain is around 15 dB .
There are many other form of Helix antenna like  quadrifilar helix antenna.The Quadrifilar Helix Antenna has 4 excitations and  each element driven a progressive 90 degrees in phase. Then  Bifilar helix is constructed using two volutes with an equal number of turns, and their starting points positioned 180° apart. The ends of the volutes are connected with a shorting wire which adds to the structural integrity of the antenna.

Helix Antenna Array


Sunday, March 5, 2017

Signal Integrity Analysis of USB 3.0 Data Bus

USB 3.0
USB(Universal Serial Bus) is the most popular connection used to connect a computer to devices such as digital cameras, printers, scanners, and external hard drives. USB is a cross-platform technology that is supported by most of the major operating systems. UART is a computer hardware device that translates data between parallel and serial forms (SerDes). A dual UART (Universal asynchronous receiver/transmitter), or DUART, combines two UARTs into a single chip. The universal asynchronous receiver/transmitter (UART) takes bytes of data and transmits the individual bits in a sequential fashion. At the destination, a second UART re-assembles the bits into complete bytes. Each UART contains a shift register, which is the fundamental method of conversion between serial and parallel forms. Serial transmission of digital information (bits) through a single wire or other medium is less costly than parallel transmission through multiple wires. Below is USB 3.0 onboard interconnect and stack of ground and power nets.
USB SI-PI Setup
SERDES is a high-speed serial data link used in integrated circuits (ICs) to serialize the parallel data and transfer it at a much faster rate. A typical SERDES architecture looks like a communication set-up with a transmit and a receive side. At transmit side, a PLL generates the fast clock necessary to drive the serializer. A clock and data recovery (CDR) circuit recovers a clock from the transmitted serial data and retimes the data at the receive side. One advantage of using SERDES is reduced clock skew, so data can be sent at the GHz rate. The main disadvantage in SERDES is timing jitter, the deviation of the actual signal transition from the expected transition in time. Timing skew is not a problem in serial interface because in each data lane, there is only one differential signal in each direction, and there is no external clock signal since clocking information is embedded within the serial signal itself.
usbs2.jpgEM simulated data is extracted for USB data group signals and combined with USB connector EM Data. Simulated result of USB connector to USB controller chip is shown here. This data is combined with other channel components for full channel simulation. From this analysis, important factors from a Signal Integrity point of view (e.g., impedance matching, reflection, attenuation, impedance mismatch, propagating delay, crosstalk, and alignment shapes of connectors) are analyzed.
usbs3
As shown here, without any equalization eye is closed and after applying RX equalization eye is open and meeting USB specification. The idea behind equalization is to use the voltage levels of the other bits to correct the voltage level of the current bit. Due to the inter-symbol interference (ISI) from the frequency dependent loss of the channel, the eye of the received signals is totally closed, and the clock and data cannot be recovered from the severely distorted signals. After the equalizer, the eye of the equalized signals is opened.